Ltspice timestep too small ошибка

But now I’m not getting the desired results. My circuit is shown below, it is a biasing circuit of an RF PCB which should give 50 V on «Vout» node and -5-0V regulated voltage on «Vgate». This circuit is taken from Ampleon application note AN11130. Schematic file is attached below. Any help would be highly appreciated.

Regards
Munazzah

Also need to include symbol files (.asy).

In general, you should minimize the use of macromodels and third party models whenever possible. Substitute behavioral sources when possible, especially for simple components like op amps and logic gates. Once the simulation is working, you can replace them with accurate models one at a time, if you wish.

Also keep in mind that the error message will often misidentify the issue. I’ve had many occasions where I saw the same timestep error, and referred to some node inside a macromodel, but fixed it by changing things outside the model.

Look at things connected to the called-out nodes and elements for such suspects. They could be B sources buried inside a subcircuit model that go to infinity or divide by a zero value because you left an argument to default, etc.

….mind you , the Graet guy Helmut Sennewald, who used to keep this forum, has sadly passed away..may he rest in deserved peace.

Behavioral and ideal sources can introduce timestep problems when their functions and derivatives are any of (unbounded, discontinuous, non-monotonic, hysteretic).

Sure, it’s possible for simple behavioral models to give bad results, but such issues are generally easy to solve via common sense, and the models are transparent for debugging. On the other hand, LT’s macromodels are perfect black boxes, and give zero useful guidance on how to debug them when they misbehave. For example, in this case the error message references a node inside a macromodel which cannot be observed or analyzed.

Have you tried modifying Maximum Timestep, Time to start saving data (and Stop time)? > Would modifying those parameters throw up functional simulations but that show ‘false’ results?
Does your simulation duration give U3 enough time to start up? > Does U3 datasheet give you any clues as to why there is ‘trouble with U3’?
40u/5n is 8,000 points — does LTSpice like that for complex circuits (maybe the problem isn’t U3 at all but simulation tool limitations)?
Not questions expecting any answers, just suggestions to bear in mind.

Also need to include symbol files (.asy).

I’ve already attached it initially in my question

If that didn’t work, no idea. If reducing Stop time to e.g. 5 us or 10 us makes no difference, not sure what to suggest. Not an expert… See if LTSpice in the general settings for simulations has a maximum number of — I think they may be called — iterations, and if you can change the number. I’m guessing about that parameter, but 100 iterations (or whatever the word is to express what I mean) to cover 8,000 points might make the simulation not work. Again — I’m guessing and might be getting that concept wrong, you’d need to look into LTSpice help information. Checking if the simulation program can deal with 5ns timesteps, I assume it can, is also worth looking into. I use another simulator that either almost always works/converges and only very occasionally only works/converges when I change the settings of ‘TR max iteration number’ and TR maximum time step, changing time step to one much larger is usually enough for the things I look at. It’s set at 10G and if needs must I change it to 100us or 1ms, for example — problem is, does that create false results?

‘TR truncation error factor’ was also one it was suggested to change in the tool I use when simulations weren’t working.

There’s also one called ‘Max. number of saved TR points’ — I’ve never touched that but it’s set at 1 million.

Look at about

only half of the list of analysis parameters a person can twiddle, I understand about three of them:

Another example, trying to summarize the irritating afternoon for brevity’s sake, yesterday I was simulating a 10 kHz typical two-BJT relaxation oscillator and a bad but functional home-brew 10 kHz oscillator design: Besides the relax osc. needing ridiculously unrealistically small resistor values and having to e.g. make one capacitor 10nF and the other 11nF just for it to start up and simulate anything that would happen in the real world, I can simulate them for up to a few milliseconds or around 100ms at most, any longer and one supposedly ‘dies’ and the other shows steady DC voltage outputs from 0s onwards. Another circuit, a basic inverting charge pump at 1 kHz is happy to simulate for at least 20 seconds. Go figure. I’d need to dedicate another fun afternoon to figure out the why and hopefully square the circle(s).

Sometimes you get errors from giving something too long a name or using a symbol in a name somewhere, having too many IC components (I think somebody has already said that), and so on.

Sorry I can’t be of more help.

LT or AD, whoever it is now who has a proprietary forum related to the tool, might have threads with similar problems and suggestions.